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74LVC138APW-Q100J
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74LVC138APW-Q100J Overview
The 74LVC138A-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LVC138A features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74LVC138A-Q100 to a 1-of-32 (5 to 32 lines) decoder with just four 74LVC138A-Q100 ICs and one inverter. The 74LVC138A-Q100 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
- Overvoltage tolerant inputs to 5.5 V
- Wide supply voltage range from 1.2 V to 3.6 V
- CMOS low power consumption
- Direct interface with TTL levels
- Demultiplexing capability
- Multiple input enable for easy expansion
- Ideal for memory chip select decoding
- Mutually exclusive outputs
- Output drive capability 50 Ω transmission lines at 125 °C
- Complies with JEDEC standard:
- JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A (2.3 V to 2.7 V)
- JESD8-C/JESD36 (2.7 V to 3.6 V)
- JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A (2.3 V to 2.7 V)
- JESD8-C/JESD36 (2.7 V to 3.6 V)
- ESD protection:
- MIL-STD-883, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
- MIL-STD-883, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
- Multiple package options
- DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
Product Parameters
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id
http://www.data.nexperia.com/id/plm/salesItem/935300919118
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name
74LVC138APW-Q100J
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packingQuantity
2,500
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nc12
935300919118
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packingDescription
Reel 13" Q1/T1
Technical Documents
Other distributor's price
Distributor | Part # | Mfg. | Description | Price |
---|---|---|---|---|
![]() |
74LVC138APW-Q100J | Nexperia | Decoder/Demultiplexer Single 3-to-8 Automotive 16-Pin TSSOP T/R |
7500---$0.1613 |
![]() |
74LVC138APW-Q100J | Nexperia | IC DECODER/DEMUX 1X3:8 16TSSOP |
1---$0.5100 10---$0.4340 25---$0.4048 100---$0.3238 250---$0.3007 500---$0.2544 1000---$0.1966 |
![]() |
74LVC138APW-Q100J | Nexperia | Decoder/Demultiplexer Single 3-to-8 Automotive 16-Pin TSSOP T/R |
7500---$0.1613 10000---$0.1597 15000---$0.1581 25000---$0.1565 30000---$0.1550 50000---$0.1534 100000---$0.1519 |
![]() |
74LVC138APW-Q100J | Nexperia |
5000---$0.1213 |
|
![]() |
74LVC138APW-Q100J | Nexperia | Encoders, Decoders, Multiplexers & Demultiplexers 74LVC138APW-Q100/SOT403/TSSOP1 |
1---$0.5100 10---$0.4340 100---$0.3240 500---$0.2550 1000---$0.1970 2500---$0.1790 5000---$0.1670 10000---$0.1580 25000---$0.1520 |
![]() |
74LVC138APW-Q100J | Nexperia | Decoder/Demultiplexer, 3:8, Tssop-16, Logic Family/Base Number:74Lvc138, Logic Type:3-To-8 Line Decoder/Demultiplexer, No. Of Outputs:8Outputs, Logic Case Style:Tssop, No. Of Pins:16Pins, Supply Voltage Min:1.65V, Supply Voltage Rohs Compliant: Yes |Nexperia 74LVC138APW-Q100J |
1---$0.5100 10---$0.4340 25---$0.3970 50---$0.3610 100---$0.3240 250---$0.2900 500---$0.2550 1000---$0.1970 |
![]() |
74LVC138APW-Q100J | Nexperia | Decoder/Demultiplexer Single 3-to-8 16-Pin TSSOP T/R - Tape and Reel (Alt: 74LVC138APW-Q100/J) |
3118---$0.1187 3200---$0.1155 6300---$0.1123 16000---$0.1091 32000---$0.1059 160000---$0.1027 320000---$0.0994 |
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