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74LVC16374ADGG-Q1J

  • 74LVC16374ADGG-Q1J

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74LVC16374ADGG-Q1J Overview

The 74LVC16374A-Q100; 74LVCH16374A-Q100 is a 16 - bit edge - triggered D - type flip - flop with 3 - state outputs. The device can be used as two 8 - bit flip - flops or one 16 - bit flip - flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8 - bits. The flip - flops will store the state of their individual D - inputs that meet the set - up and hold time requirements on the LOW - to - HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a high - impedance OFF - state. Operation of the nOE input does not affect the state of the flip - flops . Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt - trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Overvoltage tolerant inputs to 5.5 V
  • Wide supply voltage range from 1.2 V to 3.6 V
  • CMOS low power dissipation
  • Multibyte flow-through standard pinout architecture
  • Low inductance multiple supply pins for minimum noise and ground bounce
  • Direct interface with TTL levels
  • All data inputs have bus hold (74LVCH16374A-Q100 only)
  • High-impedance outputs when V
  • CC
  • Complies with JEDEC standard:
  • JESD8-7A (1.65 V to 1.95 V)
  • JESD8-5A (2.3 V to 2.7 V)
  • JESD8-C/JESD36 (2.7 V to 3.6 V)
  • JESD8-7A (1.65 V to 1.95 V)
  • JESD8-5A (2.3 V to 2.7 V)
  • JESD8-C/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
  • MIL-STD-883, method 3015 exceeds 2000 V
  • HBM JESD22-A114F exceeds 2000 V
  • MM JESD22-A115-A exceeds 200 V (C = 200 pF; R = 0 )
  • MIL-STD-883, method 3015 exceeds 2000 V
  • HBM JESD22-A114F exceeds 2000 V
  • MM JESD22-A115-A exceeds 200 V (C = 200 pF; R = 0 )

Product Parameters

  • id

    http://www.data.nexperia.com/id/plm/salesItem/935300232118

  • name

    74LVC16374ADGG-Q1J

  • packingQuantity

    2,000

  • nc12

    935300232118

  • packingDescription

    Reel 13" Q1/T1

Technical Documents

  • Footprint for wave solderingDetails>>

  • 74LVC16374ADGG-Q100 Nexperia Product ReliabilityDetails>>

  • Pin FMEA for LVC familyDetails>>

  • Power considerations when using CMOS and BiCMOS logic devicesDetails>>

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Other distributor's price

Distributor Part # Mfg. Description Price
digikey 74LVC16374ADGG-Q1J Nexperia IC FF D-TYPE DUAL 8BIT 48TSSOP

1---$1.2900

10---$1.1510

25---$1.0924

100---$0.8972

250---$0.8387

500---$0.7412

1000---$0.5851
future 74LVC16374ADGG-Q1J Nexperia

2000---$0.4090
mouser 74LVC16374ADGG-Q1J Nexperia Flip Flops 74LVC16374ADGG-Q100/SOT362/TSS

2000---$0.5330

4000---$0.5150
newark 74LVC16374ADGG-Q1J Nexperia Ic, Bilateral Switch Rohs Compliant: Yes |Nexperia 74LVC16374ADGG-Q1J

2000---$0.6010
avnet 74LVC16374ADGG-Q1J Nexperia Flip Flop D-Type Pos-Edge 3-ST 8-Element 48-Pin TSSOP T/R - Tape and Reel (Alt: 74LVC16374ADGG-Q1J)

2000---$0.6327

4000---$0.6156

8000---$0.5985

12000---$0.5814

16000---$0.5643

20000---$0.5472

200000---$0.5301

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