Features

• FMCW transceiver
• Integrated PLL, transmitter, receiver, Baseband, and ADC
• 60- to 64-GHz coverage with 4-GHz continuous bandwidth
• Four receive channels
• Three transmit channels
• Supports 6-bit phase shifter
• Ultra-accurate chirp engine based on fractional-N PLL
• TX power: 12 dBm
• RX noise figure:
• 12 dB
• Phase noise at 1 MHz:
• Built-in calibration and self-test
• Built-in firmware (ROM)
• Self-calibrating system across process and temperature
• Embedded self-monitoring with no host processor involvement on Functional Safety-Compliant devices
• C674x DSP for advanced signal processing (AWR6843 only)
• Hardware accelerator for FFT, filtering, and CFAR processing
• Memory compression
• Arm Cortex -R4F microcontroller for object detection, and interface control
• Supports autonomous mode (loading user application from QSPI flash memory)
• Internal memory with ECC
• AWR6843:1.75 MB, divided into MSS program RAM (512 KB), MSS data RAM (192 KB), DSP L1RAM (64KB) and L2 RAM (256 KB), and L3 radar data cube RAM (768 KB)
• AWR6443: 1.4 MB, divided into MSS program RAM (512 KB), MSS data RAM (192 KB), and L3 radar data cube RAM (768 KB)
• Technical reference manual includes allowed size modifications
• Other interfaces available to user application
• Up to 6 ADC channels (low sample rate monitoring)
• Up to 2 SPI ports
• Up to 2 UARTs
• 2 CAN-FD interfaces
• I2C
• GPIOs
• 2 lane LVDS interface for raw ADC data and debug instrumentation
• Device Security (
• on select part variants
• Secure authenticated and encrypted boot support
• Customer programmable root keys, symmetric keys (256 bit), Asymmetric keys (up to RSA-2K) with Key revocation capability
• Crypto software accelerators - PKA , AES (up to 256 bit), SHA (up to 256 bit), TRNG/DRGB
• Functional Safety-Compliant
• Developed for functional safety applications
• Documentation available to aid ISO 26262 functional safety system design up to ASIL-D
• Hardware integrity up to ASIL-B
• Safety-related certification
• ISO 26262 certified up to ASIL B by TUV SUD
• Non-Functional safety variants also available
• AEC-Q100 qualified
• Power management
• Built-in LDO network for enhanced PSRR
• I/Os support dual voltage 3.3 V/1.8 V
• Clock source
• 40.0 MHz crystal with internal oscillator
• Supports external oscillator at 40 MHz
• Supports externally driven clock (square/sine) at 40 MHz
• Easy hardware design
• 0.65-mm pitch, 161-pin 10.4 mm × 10.4 mm flip chip BGA package for easy assembly and low-cost PCB design
• Small solution size
• Operating conditions:
• Junction temperature range of –40°C to 125°C